Demystifying Chipmaking

PAP/CDR /E

Richard F. Yanda 저자(글)

Newnes · 2005년 04월 14일

책 소개

작가정보

저자(글) Richard F. Yanda

목차

• Foreword	p. xi
  Acknowledgments	p. xiii
  About the Authors	p. xv
  What's on the CD-ROM?	p. xvii
  IC Fabrication Overview	p. 1
  Introduction	p. 3
  Integrated Circuits	p. 3
  The Semiconductor Industry	p. 6
  Support Technologies	p. 7
  Crystal Growth and Wafer Preparation	p. 7
  Contamination Control	p. 8
  Circuit Design and Mask Making	p. 10
  Process Diagnostics and Metrology	p. 12
  Integrated Circuit Fabrication	p. 13
  Layering	p. 13
  Patterning	p. 18
  Doping	p. 21
  Process Control and In-line Monitoring	p. 22
  Test and Assembly	p. 25
  Electrical Tests	p. 25
  Die Separation	p. 25
  Die Attach and Wire Bonding	p. 25
  Encapsulation	p. 26
  Final Test	p. 26
  Summary	p. 27
  Support Technologies	p. 29
  Introduction	p. 31
  Contamination Control	p. 33
  Why Control Contamination?	p. 33
  Contamination Sources	p. 35
  The Cleanroom	p. 36
  Crystal Growth and Wafer Preparation	p. 41
  Introduction	p. 41
  Silicon Purification	p. 42
  Czochralski Silicon Growth	p. 43
  Shaping, Grinding, Cutting and Polishing	p. 46
  Final Inspection and Shipping	p. 47
  Circuit Design	p. 49
  Introduction	p. 49
  Product Definition and New Product Plan	p. 50
  The Design Team	p. 53
  The Design Process	p. 55
  Design Verification and Tapeout	p. 57
  Photomask and Reticle Preparation	p. 59
  Introduction	p. 59
  Reticle Substrate Preparation	p. 59
  Pattern Transfer	p. 60
  Inspection and Defect Repair	p. 61
  Forming Wells	p. 63
  Introduction	p. 65
  Initial Oxidation	p. 71
  Photolithography	p. 79
  Introduction	p. 79
  Coat (Spin)	p. 82
  Exposure (Step)	p. 83
  Develop	p. 84
  After Develop Inspect (ADI)	p. 85
  Ion Implantation	p. 87
  Isolate Active Areas (Shallow Trench Isolation)	p. 93
  Introduction to Shallow Trench Isolation	p. 95
  Pad Oxide Growth	p. 99
  Silicon Nitride Deposition	p. 101
  Photolithography for Photo/Etch	p. 105
  Hard Mask Formation Using Plasma Etch	p. 107
  Hard Mask Overview	p. 107
  Plasma Etch Overview	p. 109
  Etch Chemistry: Silicon Dioxide and Silicon Nitride	p. 114
  Form Trenches in Silicon with Plasma Etch	p. 119
  Fill Trenches with Silicon Dioxide	p. 121
  Chemical Mechanical Polishing (CMP) to Remove Excess Dioxide	p. 123
  Wet Etch Removal of Silicon Nitride and Pad Oxide	p. 127
  Building the Transistors	p. 129
  Introduction	p. 131
  Thin Film Formation	p. 137
  Gate Dielectric Oxidation	p. 137
  Polycrystalline Silicon (Poly) Deposition	p. 140
  Nitride Cap Deposition	p. 142
  Poly Gate Formation	p. 143
  Photoresist Patterning	p. 143
  Plasma Etch	p. 144
  Source/Drain Formation	p. 147
  Introduction	p. 147
  Shallow Implant	p. 149
  Spacer Formation	p. 149
  High-Dose Implant	p. 151
  Anneal	p. 151
  Salicide Formation	p. 153
  Sputter Cobalt	p. 155
  RTP Reaction Forming Silicide	p. 155
  Strip Residual Cobalt	p. 156
  Anneal the Silicide	p. 156
  First Level Metallization	p. 157
  Introduction	p. 159
  Nitride and Oxide Depositions	p. 163
  Nitride Deposition	p. 163
  Oxide Deposition	p. 164
  CMP Planarization	p. 167
  Photo/Etch for Contact Holes	p. 169
  Contact Hole Photolithography	p. 169
  Contact Etch	p. 170
  Tungsten Plug Process	p. 173
  Deposit Ti/TiN Barrier/Glue Layers	p. 173
  Tungsten CVD	p. 174
  Tungsten CMP	p. 176
  Low-k Dielectric Process	p. 177
  Deposit Low-k Dielectric Film	p. 177
  Trench Photolithography and Etch	p. 180
  Copper First Level Interconnection Process	p. 183
  Ta/TaN Barrier Layer Deposition	p. 183
  Sputter Copper (Cu)	p. 185
  Electroplate Copper (Cu)	p. 185
  Copper CMP	p. 186
  Multilevel Metal Interconnects and Dual Damascene	p. 189
  Introduction	p. 191
  Deposit Barrier Layer and Intermetal Dielectric	p. 195
  Dual Damascene Process	p. 197
  Introduction	p. 197
  Via Photo/Etch	p. 198
  Trench Photo/Etch	p. 199
  Deposit Barrier Layers	p. 200
  Sputter Copper	p. 200
  Electroplate Copper	p. 200
  CMP to Remove Excess Copper	p. 201
  Deposit SiC Barrier Layer	p. 202
  Build Additional Layers	p. 202
  Form Bonding Pads	p. 203
  Final Passivation Process	p. 205
  Deposit Final Passivation	p. 205
  Photo/Etch for Bonding Pads	p. 205
  Test and Assembly	p. 207
  Introduction	p. 209
  Wafer and Chip Testing	p. 211
  In-line Parametric Test	p. 211
  Wafer Sort (Probe)	p. 212
  Final Functional Test	p. 213
  Assembly and Packaging	p. 215
  Die Separation	p. 215
  Die Attach and Bond Pad Connection	p. 216
  Encapsulation	p. 218
  Science Overview	p. 219
  Introduction	p. 221
  Atoms and Molecules	p. 223
  The Atom	p. 223
  Molecules	p. 226
  Organic Molecules	p. 227
  Gases	p. 229
  Facts about Gases	p. 229
  Ions	p. 230
  Plasma	p. 230
  Free Radicals	p. 231
  Excited States	p. 231
  Chemistry	p. 233
  Introduction	p. 233
  Thin Film Deposition Chemistry	p. 233
  Plasma Etch Chemistry	p. 235
  Solids	p. 237
  Conductors and Insulators	p. 237
  Semiconductors	p. 238
  pn Junctions	p. 239
  Electricity, Electric and Magnetic Fields	p. 241
  Electric Charges and Fields	p. 241
  Electric Current	p. 242
  Magnetic Field	p. 243
  Plasma Etch Supplement to Chapter 4	p. 245
  Plasma Etcher Theory	p. 247
  Plasma Etch Process Requirements	p. 249
  Bibliography	p. 251
  Index	p. 253
  Table of Contents provided by Ingram. All Rights Reserved.

기본정보

ISBN	9780750677608 ( 0750677600 )
발행(출시)일자	2005년 04월 14일
쪽수	256쪽
크기	191 * 235 * 17 mm / 680 g
총권수	1권
언어	영어